The main goal of the HiPINEB workshop is to gather and discuss in a full-day event the latest and most prominent efforts and advances, both from industry and academia, in the design and development of scalable high-performance interconnection networks, especially those oriented towards meeting the Exascale challenge and Big-data demands.

TOPICS OF INTEREST

• Interconnect architectures and network technologies for high-speed, low-latency
  interconnects.
• Scalable network topologies, suitable for interconnecting a huge number of nodes.
• Power saving policies in the interconnect devices and network infrastructure, both at the software and at the hardware levels.
• Good practices in the configuration of the network control software.
• Network communication protocols: MPI, RDMA, Hadoop, etc.
• APIs and support for programming models.
• Routing algorithms.
• Quality of Service (QoS).
• Reliability and fault tolerance.
• Load balancing and traffic scheduling.
• Network virtualization.
• Congestion management.
• Applications and traffic characterization.
• Modeling and simulation tools.
• Performance evaluation.

IMPORTANT DATES

Submission Opens:	November 28, 2018
Paper submission due:	January 20, 2019 (Hard deadline)
Notification of acceptance:	January 30, 2019
Camera-ready papers due:	February 2, 2019
Workshop’s date:	February 17, 2019

ORGANIZERS

• Pedro Javier Garcia, University of Castilla-La Mancha, Spain
• Jesus Escudero-Sahuquillo, University of Castilla-La Mancha, Spain

STEERING COMMITTEE

• Jose Duato, Technical University of Valencia, Spain
• Ada Gavrilovska, Georgia Tech, USA
• Maria Engracia Gómez, Technical University of Valencia, Spain
• Torsten Hoefler, ETH Zurich, Switzerland
• Timothy M. Pinkston, University of Southern California, USA
• Francisco Jose Quiles, University of Castilla-La Mancha, Spain
• Eitan Zahavi, Mellanox, Israel

ADDITIONAL INFORMATION

For more information about HiPINEB 2018 or if you have any question, please contact the workshop organizers at hipineb@dsi.uclm.es